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Hardware Intelligence: AI Tools for the Chips Your AI Runs On

Hardware Intelligence is building AI-powered tools for chip design and verification. Founded by Athreya Anand and Rishov Sarkar, the company's first product is Wave, a terminal-native waveform debugger built for the agentic era.

The Problem

The AI boom is driving unprecedented demand for chip design. However, hardware verification remains a critical bottleneck: companies spend 70% of the entire chip design process just on verification. A bug that reaches manufacturing can cost nine figures.

Hardware verification engineers run thousands of simulated tests, which typically take hours to days. When a test fails, debugging requires reading a waveform—a log of every signal across millions of ticks—to find where a value went wrong. Waveform files often reach several gigabytes in size. Finding the failure point is the single largest activity in verification.

The current tools are decades old: 20-year-old GUIs behind expensive license servers, with seats running six figures annually. Free alternatives are even worse. Meanwhile, software engineers have access to coding agents, while chip engineers wait in license queues.

Wave: Terminal-Native Waveform Debugging

Wave is the first fully terminal-native waveform debugger with a built-in verification agent. It opens files before industry-standard viewers finish their license checks.

Why the terminal? Most hardware engineers are terminal power users who code in Vim. Wave meets them where they are with an intuitive interface that employs Vim bindings throughout.

Ask in plain English. Query the agent directly: "Why is wave x at 12.4us?" The agent pulls in signals, acts on them, and traces the root cause—all visually.

Pick your fix and see it. Wave proposes different approaches with tradeoffs. Select the one that matches your priorities—whether optimizing for performance, power, or other factors. Wave re-simulates, re-reads the new waveform, and shows a visual diff of how the waveform changed and where the fix was implemented.

The Founders

Athreya Anand

Athreya Anand, Founder & CEO

Athreya was a tech lead at Google, where he led AI efforts across teams from agentic workflow management tools to prediction models for Google Ventures. He holds a Master's degree in Machine Learning and A.I. from Georgia Tech, with technical expertise in agentic tools and chip design from his work at Google, AWS Inferentia, and Tesla.

Rishov Sarkar

Rishov Sarkar, Founder

Rishov holds a PhD in Electrical & Computer Engineering from Georgia Tech, where he won the 2022 ECE Graduate Teaching Assistant of the Year award. He previously developed simulators for AMD's AI Engine accelerator and worked on LLVM-based compilation flows at Siemens EDA. He earned his MS and BS in Computer Engineering from Georgia Tech.

Athreya and Rishov met in their freshman dorm at Georgia Tech nearly a decade ago and remained close friends and roommates throughout college. After graduation, Athreya moved to New York to work at Google while Rishov pursued his PhD. They committed to working together on something they were passionate about once both were free. Rishov's deep research on chip simulation and compilers became the spark for Hardware Intelligence. Today they are roommates once again.

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Get in Touch

If you design chips or lead a hardware team, Hardware Intelligence would love to work with you. Reach out at hi@hardwareintelligence.ai or visit hardwareintelligence.ai.

Contact the founders directly: